AMD Shares Details of Connecting Additional 3D V-Cache

 It is possible to increase the performance of the central processor not only by developing a new microarchitecture or increasing the number of transistors and their clock frequency, but also by using additional blocks superimposed on the already existing components of the processor crystal.

This method of increasing performance will be used in the future family of AMD processors, called 3D V-Cache . It involves overlaying additional L3 cache on the Ryzen 5000 processor's computing chiplet, increasing their performance without changing other characteristics and die sizes.

At HotChips 33, the company shared some details regarding the new stacking technology. The company considered all possible options and even the technologies of the competitor Intel Foveros and EMIB. As a result, it was decided to use AMD 3D Chiplet with TSV, the distance between which is 9 microns, which is slightly denser than what will be used in Intel Foveros Direct, which implies a distance of 10 microns.



AMD expects its 3D Chiplet technology to improve interconnect energy efficiency by 3x and increase interconnect density by 15x.



The first AMD processors with 3D V-Cache will be Ryzen 5000. At the moment, the company does not name the names of the processors that will receive an improvement with additional cache, but, most likely, senior solutions in the persons of Ryzen 9 5900 and Ryzen 9 5950X should receive it. AMD expects a 15% increase in performance from the new technology.

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